HT32F49153/HT32F49163
32-bit Arm® Cortex®-M4 MCU
General Information
The HT32F49153/HT32F49163 devices are based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 150 MHz. The Cortex®-M4 core features a Floating Point Unit (FPU) single precision supporting all Arm® single-precision data processing instructions and data types. It also implements a full set of DSP instructions and a Memory Protection Unit (MPU) that enhances application security.
The devices incorporate high-speed on-chip memories, including up to 256 Kbytes of Flash memory, 48 Kbytes of SRAM, and 20 Kbytes of boot memory that can be used as a Bootloader or as a general instruction/data memory (one-time-configurable) to achieve the maximum of 256+20 Kbytes. Any block of the embedded Flash memory can be protected by the “sLib” (security library), functioning as a security area with code-executable only. In addition, the devices include a highlevel memory extension: an external memory controller (XMC).
The devices offer one 12-bit ADC, two 12-bit DACs, eight general-purpose 16-bit timers plus one general-purpose 32-bit timer, two basic timers, one advanced timer and one low-power ERTC. It also features standard and advanced communication interfaces: up to three I²Cs, three SPIs (multiplexed as I²Ss), eight USARTs, two CANs, an OTGFS, and infrared transmitter.
The devices operate in the -40 to +105 °C temperature range, from a 2.4 to 3.6 V power supply. A comprehensive set of power-saving mode allows the design of low-power application.
The devices are supplied in different package types. The entire HT32F49153/HT32F49163 series of devices are pin-to-pin, software and functionally compatible with each other, except that the configurations of peripherals are not fully identical depending on the package types.
Feature Details
| Attribute | Value |
|---|---|
| ▆ Core: ARM® 32-bit Cortex®-M4 CPU with FPU |
|
▆ Memories
| Attribute | Value |
|---|---|
| 64 to 256 Kbytes of Flash memory | Available |
| 20 Kbytes of boot memory used as a Bootloader or as a general instruction/data memory (onetime configured) | Available |
| sLib | configurable part of main Flash as a library area with code executable but secured, nonreadable |
| Up to 48 Kbytes of SRAM | Available |
| External memory controller (XMC) with 16-bit data bus supporting multiplexed PSRAM and NOR memories | Available |
Feature Details
| Attribute | Value |
|---|---|
| ▆ XMC as LCD parallel interface, 8080/6800 modes | Available |
▆ Power control (PWC)
| Attribute | Value |
|---|---|
| 2.4 V to 3.6 V power supply | Available |
| Power-on reset (POR)/low-voltage reset (LVR), and power voltage monitor (PVM) | Available |
| Low-power modes | Sleep, Deepsleep and Standby modes |
| 20 × 32-bit battery powered registers (ERTC_BPR) | Available |
Feature Details
| Attribute | Value |
|---|---|
| ▆ Clock and reset management (CRM) |
|
| ▆ Analog |
|
| ▆ DMA: 14-channel DMA controller | Available |
| ▆ Up to 87 fast GPIOs |
|
▆ Up to 15 timers (TMR)
| Attribute | Value |
|---|---|
| 1 × 16-bit 7-channel advanced timer with dead-time generator and emergency break | Available |
| Up to 8 ×16-bit and 1 × 32-bit general-purpose timers, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input | Available |
| 2 × 16-bit basic timers | Available |
| 2 × watchdog timers (general WDT and windowed WWDT) | Available |
| SysTick timer | a 24-bit downcounter |
Feature Details
| Attribute | Value |
|---|---|
| ▆ ERTC: enhanced RTC with auto wakeup, alarm, subsecond accuracy, hardware calendar and calibration feature | Available |
| ▆ Up to 18 communication interfaces |
|
| ▆ CRC calculation unit | Available |
| ▆ 96-bit ID (UID) | Available |
| ▆ Debug mode | SWD and JTAG interfaces |
| ▆ Temperature range: -40 to +105℃ | Available |
| ▆ Packaging |
|
▆ List of models
| Attribute | Value |
|---|---|
| 128 Kbytes | HT32F49153 |
| 256 Kbytes | HT32F49163 |
Resources
| Title | Date | File Size | Language | Download |
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