HT32F59041

Enhanced 24-bit A/D Arm® Cortex®-M0+ MCU

General Information

The Holtek HT32F59041 device is a high performance, low power consumption 32-bit microcontroller based around an Arm® Cortex®-M0+ processor core. The Cortex®-M0+ is a nextgeneration processor core which is tightly coupled with Nested Vectored Interrupt Controller (NVIC), SysTick timer, and including advanced debug support.

The device operates at a frequency of up to 20 MHz with a Flash accelerator to obtain maximum efficiency. It provides 64 KB of embedded Flash memory for code/data storage and 8 KB of embedded SRAM memory for system operation and application program usage. A variety of peripherals, such as Hardware Divider DIV, ADC, I2C, USART, UART, SPI, MCTM, GPTM, PWM, BFTM, CRC-16/32, RTC, WDT, SW-DP (Serial Wire Debug Port), etc., are also implemented in the device. Several power saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption, an especially important consideration in low power applications.

The device also contains a multi-channel 24-bit Delta Sigma A/D converter which includes a programmable gain amplifier and is designed for applications that interface differentially to analog signals.

The above features ensure that the device is suitable for use in a wide range of applications, especially in areas such as white goods application controllers, power monitors, alarm systems, consumer products, handheld equipment, data logging applications, motor controllers and so on.

 

Feature Details

Core
  • 32-bit Arm® Cortex®-M0+ processor core
  • Up to 20 MHz operating frequency
  • Single-cycle multiplication
  • Integrated Nested Vectored Interrupt Controller (NVIC)
  • 24-bit SysTick timer
On-chip Memory
  • 64 KB on-chip Flash memory for instruction/data and options storage
  • 8 KB on-chip SRAM
  • Supports multiple boot modes
Flash Memory Controller – FMC
  • 32-bit word programming with In System Programming Interface (ISP) and In Application Programming (IAP)
  • Flash protection capability to prevent illegal access

Reset Control Unit – RSTCU

Supply supervisor:
  • - Power On Reset / Power Down Reset – POR/PDR
  • - Brown-out Detector – BOD
  • - Programmable Low Voltage Detector – LVD

Feature Details

Clock Control Unit – CKCU
  • External 4 to 20 MHz crystal oscillator
  • External 32.768 kHz crystal oscillator
  • Internal 20 MHz RC oscillator trimmed to ±2 % accuracy at 25 °C operating temperature
  • Internal 32 kHz RC oscillator
  • Independent clock divider and gating bits for peripheral clock sources

Power Management Control Unit – PWRCU

Single VDD power supply

2.5 V to 5.5 V

Integrated 1.5 V LDO regulator for CPU core, peripherals and memories power supplyAvailable
Two power domains

VDD and 1.5 V

Three power saving modes

Sleep, Deep-Sleep1, Deep-Sleep2

Feature Details

Real Time Clock – RTC
  • 24-bit up-counter with a programmable prescaler
  • Alarm function
  • Interrupt and Wake-up event
External Interrupt / Event Controller – EXTI
  • Up to 16 EXTI lines with configurable trigger source and type
  • All GPIO pins can be selected as EXTI trigger source
  • Source trigger type includes high level, low level, negative edge, positive edge, or both edges
  • Individual interrupt enable, wakeup enable and status bits for each EXTI line
  • Software interrupt trigger mode for each EXTI line
  • Integrated deglitch filter for short pulse blocking
Hardware Divider – DIV
  • Signed/unsigned 32-bit divider
  • Operation in 8 clock cycles, load in 1 clock cycle
  • Divide by zero error Flag
12-Bit Analog to Digital Converter – ADC
  • 12-bit SAR ADC engine
  • Up to 1 Msps conversion rate
  • Up to 12 external analog input channels
24-Bit Delta Sigma Analog to Digital Converter – ΔΣ ADC
  • Internal Programmable Gain Amplifier
  • Internal I2C interface for external communication
  • 5 Hz ~ 1.6 kHz ADC output data rate
  • Internal temperature sensor for compensation
I/O Ports – GPIO
  • 30 GPIOs
  • Port A, B, C are mapped as 16 external interrupts – EXTI
  • Almost all I/O pins have configurable output driving current
Basic Function Timer – BFTM
  • One 32-bit compare match count-up counter – no I/O control features
  • One shot mode – counting stops after compare match occurs
  • Repetitive mode – restart counter when compare match occurs
Motor Control Timer – MCTM
  • One 16-bit up, down, up/down auto-reload counter
  • 16-bit programmable prescaler allowing counter clock frequency divided by any factor between 1 and 65536
  • Input Capture function
  • Compare Match Output
  • PWM waveform generation with Edge-aligned and Center-aligned Counting Modes
  • Single Pulse Mode Output
  • Complementary Outputs with programmable dead-time insertion
  • Break input to force the timer’s output signals into a reset or fixed condition
PWM Generation and Capture Timer – GPTM
  • One 16-bit up, down, up/down auto-reload counter
  • Up to 4 independent channels for each timer
  • 16-bit programmable prescaler allowing the counter clock frequency devided by any factor between 1 and 65536
  • Input Capture function
  • Compare Match Output
  • PWM waveform generation with Edge-aligned and Center-aligned Counting Modes
  • Single Pulse Mode Output
  • Encoder interface controller with two inputs using quadrature decoder
Pulse Width Modulation – PWM
  • One 16-bit up, down, up/down auto-reload counter
  • Up to 4 independent channels for each timer
  • 16-bit programmable prescaler allowing counter clock frequency divided by any factor between 1 and 65536
  • Compare Match Output
  • PWM waveform generation with Edge-aligned and Center-aligned Counting Modes
  • Single Pulse Mode Output
Watchdog Timer – WDT
  • 12-bit down counter with 3-bit prescaler
  • Reset event for the system
  • Programmable watchdog timer window function
  • Register write protection function
Inter-integrated Circuit – I2C
  • Supports both master and slave modes with a frequency of up to 1 MHz
  • Provides an arbitration function and clock synchronization
  • Supports 7-bit and 10-bit addressing modes and general call addressing
  • Supports slave multi-addressing mode with address mask function

Serial Peripheral Interface – SPI

Supports both master and slave modesAvailable
Frequency of up to (fPCLK/2) MHz for the master mode and (fPCLK/3) MHz for the slave modeAvailable
FIFO Depth

8 levels

Multi-master and multi-slave operationAvailable

Universal Synchronous Asynchronous Receiver Transmitter – USART

Supports both asynchronous and clocked synchronous serial communication modesAvailable
Asynchronous operating baud-rate clock frequency up to (fPCLK/16) MHz and synchronous operating clock frequency up to (fPCLK/8) MHzAvailable
Full duplex communicationAvailable
Fully programmable serial communication characteristics including:
  • - Word length: 7, 8 or 9-bit character
  • - Parity: Even, odd or no-parity bit generation and detection
  • - Stop bit: 1 or 2 stop bit generation
  • - Bit order: LSB-first or MSB-first transfer
Error detection

Parity, overrun and frame error

Auto hardware flow control mode – RTS, CTSAvailable
IrDA SIR encoder and decoderAvailable
RS485 mode with output enable controlAvailable
FIFO Depth

8 × 9 bits for both receiver and transmitter

Universal Asynchronous Receiver Transmitter – UART

Asynchronous serial communication operating baud-rate clock frequency up to (fPCLK/16) MHzAvailable
Full duplex communicationAvailable
Fully programmable serial communication characteristics including:
  • - Word length: 7, 8 or 9-bit character
  • - Parity: Even, odd or no-parity bit generation and detection
  • - Stop bit: 1 or 2 stop bit generation
  • - Bit order: LSB-first or MSB-first transfer
Error detection

Parity, overrun and frame error

Cyclic Redundancy Check – CRC

Supports CRC16 polynomial: 0x8005,

X16+X15+X2+1

Supports CCITT CRC16 polynomial: 0x1021,

X16+X12+X5+1

Supports IEEE-802.3 CRC32 polynomial: 0x04C11DB7,

X32+X26+X23+X22+X16+X12+X11+X10+X8+X7+X5+X4+X2+X+1

Supports 1’s complement, byte reverse & bit reverse operation on data and checksumAvailable
Supports byte, half-word & word data sizeAvailable
Programmable CRC initial seed valueAvailable
CRC computation executed in 1 AHB clock cycle for 8-bit data and 4 AHB clock cycles for 32-bit dataAvailable

Feature Details

Debug Support
  • Serial Wire Debug Port – SW-DP
  • 4 comparators for hardware breakpoint or code / literal patch
  • 2 comparators for hardware watchpoints

Package and Operation Temperature

48-pin LQFP packageAvailable
Operation temperature range

-40°C to +85°C

Resources

TitleDateFile SizeLanguageDownload