HT32F61355/HT32F61356/HT32F61357

32-Bit Arm® Cortex®-M0+ Music Synthesizer MCU

General Information

These devices are high performance, low power consumption 32-bit microcontrollers based around an Arm® Cortex®-M0+ processor core. The Cortex®-M0+ is a next-generation processor core which is tightly coupled with Nested Vectored Interrupt Controller (NVIC), SysTick timer and including advanced debug support.

The devices operate at a frequency of up to 48 MHz with a Flash accelerator to obtain maximum efficiency. They provide up to 128 KB of embedded Flash memory for code/data storage and 16 KB of embedded SRAM memory for system operation and application program usage. A variety of peripherals, such as ADC, 2-channel DAC, I2C, I2S, USART, UART, SPI, QSPI, GPTM, SCTM, CRC-16/32, RTC, WDT, USB2.0 FS, 32-channel music synthesizer, SW-DP (Serial Wire Debug Port), etc., are also implemented in the devices. Several power saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption, an especially important consideration in low power applications.

The devices integrate Wave Table synthesis function. They can operate up to 32 channels of Wave Table synthesis at one time and control the MIDI Engine to generate melody by setting the special registers. The Wave Table synthesis waveform data including instrument tone, MIDI scores, voice, sound effect,etc., are strored in the internal SPI Flash Data Memory. With these features, the devices provide enhanced functions and higher performance.

The above features ensure that the devices are suitable for use in a wide range of applications, especially in areas such as electronic organs, digital pianos, electronic drums, electric guitars, electric accordions and so on.

 

Feature Details

Core
  • 32-bit Arm® Cortex®-M0+ processor core
  • Up to 48 MHz operating frequency
  • Single-cycle multiplication
  • Integrated Nested Vectored Interrupt Controller (NVIC)
  • 24-bit SysTick timer
On-Chip Memory
  • Up to 128 KB on-chip Flash memory for instruction/data and option byte storage
  • 16 KB on-chip SRAM
  • Supports multiple boot modes
Flash Memory Controller -- FMC
  • Flash accelerator for maximum efficiency
  • 32-bit word programming with In System Programming Interface (ISP) and In Application Programming (IAP)
  • Flash protection capability to prevent illegal access

Reset Control Unit -- RSTCU

Supply supervisor:
  • -- Power On Reset / Power Down Reset – POR/PDR
  • -- Brown-out Detector - BOD
  • -- Programmable Low Voltage Detector - LVD

Feature Details

Clock Control Unit -- CKCU
  • External 4 to 16 MHz crystal oscillator
  • External 32,768 Hz crystal oscillator
  • Internal 8 MHz RC oscillator trimmed to ±2 % accuracy at 3.3 V operating voltage and 25 °C operating temperature
  • Internal 32 kHz RC oscillator
  • Integrated system clock PLL
  • Independent clock divider and gating bits for peripheral clock sources

Power Management -- PWRCU

Single Vdd power supply

2.0 V to 3.6 V

Integrated 1.5 V LDO regulator for MCU core, peripherals and memories power supplyAvailable
Vdd power supply for RTCAvailable
Two power domains

Vdd , VCORE

Four power saving modes

Sleep, Deep-Sleep1, Deep-Sleep2, Power-Down

Feature Details

External Interrupt/Event Controller -- EXTI
  • Up to 16 EXTI lines with configurable trigger source and type
  • All GPIO pins can be selected as EXTI trigger source
  • Source trigger type includes high level, low level, negative edge, positive edge or both edges
  • Individual interrupt enable, wakeup enable and status bits for each EXTI line
  • Software interrupt trigger mode for each EXTI line
  • Integrated deglitch filter for short pulse blocking
Analog to Digital Converter – ADC
  • 12-bit SAR ADC engine
  • Up to 1 Msps conversion rate
  • Up to 16 external analog input channels
I/O Ports -- GPIO
  • Up to 43 GPIOs
  • Port A, B, C, D are mapped to 16-line EXTI interrupts
  • Almost all I/O pins have a configurable output driving current
General-Purpose Timer -- GPTM
  • 16-bit up, down, up/down auto-reload counter
  • 16-bit programmable prescaler that allows division of the prescaler clock source by any factor between 1 and 65536 to generate the counter clock frequency
  • Input Capture function
  • Compare Match Output
  • PWM waveform generation with Edge-aligned and Center-aligned Counting Modes
  • Single Pulse Mode Output
  • Encoder interface controller with two inputs using quadrature decoder
Single-Channel Timer – SCTM
  • 16-bit up and auto-reload counter
  • One channel for each timer
  • 16-bit programmable prescaler that allows division of the prescaler clock source by any factor between 1 and 65536 to generate the counter clock frequency
  • Input Capture function
  • Compare Match Output
  • PWM waveform generation with Edge-aligned
Basic Function Timer -- BFTM
  • One 32-bit compare match count-up counter – no I/O control features
  • One shot mode – counter stops counting when compare match occurs
  • Repetitive mode – counter restarts when compare match occurs
Digital to Analog Converter – DAC

Two 16-bit high resolution D/A converters with excellent frequency response characteristics and good power consumption for stereo audio output

Music Synthesis Engine (MIDI Engine) – MSE
  • Up to 32 simultaneous sounds @ CPU Frequency = 48 MHz / Up to 16 simultaneous sounds @ CPU Frequency = 24 MHz
  • 10-bit Volume Control
  • Output sampling frequency up to 50 kHz
  • Waveform data lengths of 8, 12 or 16 bits
  • Stereo output
  • Supports Repeat loop Play
  • Supports PDMA interface
Watchdog Timer -- WDT
  • 12-bit down counter with 3-bit pre-scaler
  • Provides reset to the system
  • Programmable watchdog timer window function
  • Register write protection function
Real Time Clock -- RTC
  • 32-bit up-counter with a programmable pre-scaler
  • Alarm function
  • Interrupt and Wake-up event
Inter-integrated Circuit -- I2C
  • Supports both master and slave modes with a frequency of up to 1 MHz
  • Provides an arbitration function and clock synchronization
  • Supports 7-bit and 10-bit addressing modes and general call addressing
  • Supports slave multi-addressing mode with mask-able address
Inter-IC Sound (I2S) – I2S
  • Master or slave mode
  • Mono and stereo
  • I2S-justified, Left-justified and Right-justified mode
  • 8 / 16 / 24 / 32-bit sample size with 32-bit channel extended
  • 8 × 32-bit TX & RX FIFO with PDMA supported
  • 8-bit Fractional Clock Divider with rate control
Operation Divider – DIV
  • Signed/unsigned 32-bit divider
  • Operation in 8 clock cycles, Load in 1 clock cycle
  • Division by zero error flag

Serial Peripheral Interface -- SPI

Supports both master and slave modesAvailable
Frequency of up to (fPCLK/2) MHz for the master mode and (fPCLK/3) MHz for the slave modeAvailable
FIFO Depth

8 levels

Multi-master and multi-slave operationAvailable

Quad Serial Peripheral Interface – QSPI

Master or slave modeAvailable
Master mode speed up to fHCLK/2Available
Slave mode speed up to fHCLK/3Available
Programmable data frame length up to 16 bitsAvailable
FIFO Depth

8 levels

MSB or LSB first shift selectionAvailable
Programmable slave select high or low active polarityAvailable
Multi-master and multi-slave operationAvailable
Master mode supports the dual/quad output read mode of QSPI series NOR FlashAvailable
Four error flags with individual interrupt
  • - Read overrun
  • - Write collision
  • - Mode fault
  • - Slave abort
Supports PDMA interfaceAvailable

Universal Synchronous Asynchronous Receiver Transmitter -- USART

Supports both asynchronous and clocked synchronous serial communication modesAvailable
Programmable baud rate clock frequency up to (fPCLK/16) MHz for Asynchronous mode and (fPCLK/8) MHz for synchronous modeAvailable
Full duplex communicationAvailable
Fully programmable serial communication characteristics including:
  • - Word length: 7, 8 or 9-bit character
  • - Parity: Even, odd or no-parity bit generation and detection
  • - Stop bit: 1 or 2 stop bit generation
  • - Bit order: LSB-first or MSB-first transfer
Error detection

Parity, overrun and frame error

Auto hardware flow control mode – RTS, CTSAvailable
IrDA SIR encoder and decoderAvailable
RS485 mode with output enable controlAvailable
FIFO Depth

8-level for both receiver and transmitter

Universal Asynchronous Receiver Transmitter -- UART

Asynchronous serial communication operating baud rate clock frequency up to fPCLK/16 MHzAvailable
Full duplex communicationAvailable
Fully programmable serial communication characteristics including:
  • - Word length: 7, 8 or 9-bit character
  • - Parity: Even, odd or no-parity bit generation and detection
  • - Stop bit: 1 or 2 stop bit generation
  • - Bit order: LSB-first or MSB-first transfer
Error detection

Parity, overrun and frame error

Cyclic Redundancy Check -- CRC

Supports CRC16 polynomial

0x8005, X16+X15+X2+1

Supports CCITT CRC16 polynomial

0x1021, X16+X12+X5+1

Supports IEEE-802.3 CRC32 polynomial

0x04C11DB7, X32+X26+X23+X22+X16+X12+X11+X10+X8+X7+X5+X4+X2+X+1

Supports 1's complement, byte reverse & bit reverse operation on data and checksumAvailable
Supports byte, half-word & word data sizeAvailable
Programmable CRC initial seed valueAvailable
CRC computation executed in 1 AHB clock cycle for 8-bit data and 4 AHB clock cycles for 32-bit dataAvailable
Supports PDMA to complete a CRC computation of a block of memoryAvailable

Feature Details

Universal Serial Bus Device Controller -- USB
  • Complies with USB 2.0 full-speed (12 Mbps) specification
  • On-chip USB full-speed transceiver
  • 1 control endpoint (EP0) for control transfer
  • 3 single-buffered endpoints (EP1 ~ EP3) for bulk and interrupt transfer
  • 4 double-buffered endpoints (EP4 ~ EP7) for bulk, interrupt and isochronous transfer
  • 1,024 bytes EP_SRAM used as the endpoint data buffers

Peripheral Direct Memory Access – PDMA

6 channels with trigger source groupingAvailable
8 / 16 / 32-bit width data transferAvailable
Supports Linear address, circular address and fixed address modesAvailable
4-level programmable channel priorityAvailable
Auto reload modeAvailable
Supports trigger source

ADC, SPI, QSPI, USART, UART, I2C, I2S, GPTM, MIDI Engine and software request

SPI Flash Data Memory

SPI Flash Data MemoryAvailable
Full voltage range

2.3 V ~ 3.6 V

Serial Interface ArchitectureAvailable
SPI compatible

Mode 0 and Mode 3

256 bytes per programmable pageAvailable
Standard, Dual or Quad SPI modesAvailable
Low power consumptionAvailable
Uniform Sector ArchitectureAvailable
Any sector or block can be erased individuallyAvailable
Software and Hardware ResetAvailable
Read Unique ID NumberAvailable

Feature Details

Debug Support
  • Serial Wire Debug Port – SW-DP
  • 4 comparators for hardware breakpoint or code / literal patch
  • 2 comparators for hardware watch points

Package and Operation Temperature

48 / 64-pin LQFP packagesAvailable
Operation temperature range

-40°C to +85°C

Resources

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